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News  & Press Releases

CLERECO news and Partners realted activites.

Consortium

CLERECO features three large enterprises, three academic partners and one SME, thus guaranteeing a good balance between industry and academia. 

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CLERECO organized workshops on reliability related topics

Publications

CLERECO publications on top class reliability related scientific journals and conferences.

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CLERECO is an ICT collaboration project funded by the European Community under the FP7.

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Latest posts

Project presentation @ HiPEAC 2016 in Prague

on 31 March 2016

Partner POLITO presented the project at the EU Project Day organized during the HiPEAC Conference 2016, Prague, 18-20 January 2016.

A Detailed Methodology to Compute Soft-Error Rates in Advanced Technologies

on 24 March 2016

Marc Riera, Ramon Canal, Jaume Abella and Antonio Gonzalez, Design, Automation and Testing in Europe, 2016  Presentation

GUFI: a Framework for GPUs Reliability Assessment

on 24 March 2016

S.Tselonis, D.Gizopoulos, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2016), Uppsala, Sweden, April, 2016.

Anatomy of Microarchitecture-Level Reliability Assessment: Throughput and Accuracy

on 24 March 2016

A.Chatzidimitriou, D.Gizopoulos, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2016), Uppsala, Sweden, April, 2016.

System-level Reliability Evaluation through Cache-aware Software-based Fault Injection

on 24 March 2016

Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio, IEEE DDECS 2016, April 20-22, 2016, Košice, Slovakia

Faults in Data Prefetchers: Performance Degradation and Variability

on 24 March 2016

N.Foutris, A.Chatzidimitriou, D.Gizopoulos, J.Kalamatianos, V.Sridharan, IEEE VLSI Test Symposium (VTS 2016), Las Vegas, NV, USA, April, 2016.

Microprocessor Reliability-Performance Tradeoffs Assessment at the Microarchitecture Level

on 24 March 2016

S.Tselonis, M.Kaliorakis, N.Foutris, G.Papadimitriou, D.Gizopoulos, IEEE VLSI Test Symposium (VTS 2016), Las Vegas, NV, USA, April, 2016

Cache- and Register-aware System Reliability Evaluation based on Data Lifetime Analysis

on 24 March 2016

Maha Kooli, Firas Kaddachi, Giorgio Di Natale, Alberto Bosio, IEEE VLSI Test Symposium 2016 (VTS'16)

Paper presentation @ ISPASS 2016

on 02 March 2016

Partner UOA will present two papers at 2016 IEEE International Symposium on Performance Analysis of Systems and Software April 17-19, 2016, Uppsala, Sweden on “Anatomy of Microarchitecture-Level Reliability Assessment: Throughput and...

Differential Fault Injection on Microarchitectural Simulators

on 02 March 2016

M. Kaliorakis, S. Tselonis, A. Chatzidimitriou, N. Foutris and D. Gizopoulos, Workload Characterization (IISWC), 2015 IEEE International Symposium on, Atlanta, GA, 2015, pp. 172-182. PDF DOI

Accelerated Microarchitectural Fault Injection-Based Reliability Assessment

on 02 March 2016

M. Kaliorakis, S. Tselonis, A. Chatzidimitriou and D. Gizopoulos,Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS), 2015 IEEE International Symposium on, Amherst, MA, 2015, pp. 47-52. PDF DOI

Early Component-Based System Reliability Analysis for Approximate Computing Systems

on 15 December 2015

Alessandro Vallero, Alessandro Savino, Gianfranco Michele Maria Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio Gonzalez, Maha Kooli, Alberto Bosio and...

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