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A. Vallero, S. Di Carlo, S. Tselonis and D. Gizopoulos, 2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Santa Rosa, CA, USA, 2017, pp. 129-130. doi: 10.1109/ISPASS.2017.7975280
DOIManolis Kaliorakis, Dimitris Gizopoulos, Ramon Canal, and Antonio Gonzalez. 2017. In Proceedings of the 44th Annual International Symposium on Computer Architecture (ISCA '17). ACM, New York, NY, USA, 241-254. DOI: https://doi.org/10.1145/3079856.3080225
DOIA. Chatzidimitriou, M. Kaliorakis, S. Tselonis and D. Gizopoulos, 2017 IEEE 35th VLSI Test Symposium (VTS), Las Vegas, NV, 2017, pp. 1-6. doi: 10.1109/VTS.2017.7928940
DOIMarc Riera, Ramon Canal, Jaume Abella and Antonio Gonzalez, Design, Automation and Testing in Europe, 2016
Alessandro Vallero, Alessandro Savino, Gianfranco Michele Maria Politano, Stefano Di Carlo, Athanasios Chatzidimitriou, Sotiris Tselonis, Manolis Kaliorakis, Dimitris Gizopoulos, Marc Riera, Ramon Canal, Antonio Gonzalez, Maha Kooli, Alberto Bosio and Giorgio Di Natale. 2nd Workshop on Approximate Computing (WAPCO)
Vatajelu, Elena I.; Rodriguez-Montanes, R.; Di Carlo, S.; Indaco, M.; Renovell, M.; Prinetto, P.; Figueras, J. (2015) . In: 20th IEEE European Test Symposium (ETS), Cluj-Napoca, RO, 25-29 May 2015. pp. 1-6
E. I. Vatajelu, R. Rodriguez-Montañes, M. Indaco, P. Prinetto and J. Figueras, Design & Technology of Integrated Systems in Nanoscale Era (DTIS), 2015 10th International Conference on, Naples, 2015, pp. 1-6.
Foutris, N.; Gizopoulos, D.; Chatzidimitriou, A.; Kalamatianos, J.; Sridharan, V., in Proceedings of the 10th IEEE Workshop on Silicon Errors in Logic – System Effects (SELSE 2014), Stanford, CA, USA, April 1-2, 2014.
Savino, A.; Di Carlo, S.; Politano, G.; Benso, A.; Di Natale, G.; Bosio, A., IEEE TRANSACTIONS ON COMPUTERS, vol.61, no.11, pp.1521,1534, Nov. 2012, ISSN: 0018-9340