Similarly to WP3, WP4 iteratively breaks down the software stack into its basic components (from high-level application software modules down to the instruction set architecture level) that will be characterized form the reliability standpoint.
To enable early reliability estimations, software analysis must be possible at early system design stages, even when a target platform is not yet defined. To cope with this requirement, WP4 aims at defining metrics and models enabling to abstract the behavior of the software no matter the specific hardware architecture of the system.
Several activities will be addressed:
- Similarly to WP3 this WP only considers the impact of the interface between the software layer and the hardware layer represented by executed microprocessor instructions. To achieve abstraction from the target architecture a processor-independent instruction-set that is as generic and complete as possible will be defined. This can be further linked, if required, to abstract functional units (e.g., arithmetic logical units, memory managements unit) to further characterize the software activity.
- Hardware-induced errors must be properly described in the software. WP4 will define precise hardware-independent fault models by considering three well-established types of errors: variable corruptions (that corresponds to an error in a data registers or in the memory), execution errors corresponding to wrong instruction op-codes and control flow errors.
- Software faulty behaviors must be precisely described and characterized. WP3 starts from a well-established taxonomy including: (i) correct execution and correct timing; (ii) correct execution but incorrect timing, (iii) fail silent violations with correct timing, (iv) fail silent violation with incorrect timing, (v) system exception, (vi) crash. This taxonomy will be revised and improved based on specific requirements identified in WP2.
- Early reliability estimation requires coping with all design stages and therefore with different software descriptions including black box modules, user-defined functions, library functions, legacy code, instructions.
Once all these issues are covered, we will analyze each software component level: system, selected drivers and application. This analysis will be the foundation for the construction of a set of characterized software modules to be used in WP5 and WP6.
Finally, WP4 will also be engaged in the production of a preliminary library of characterized modules that will be exploited for the validation and demonstration activity of this project. Similar to WP3, realizing a full comprehensive library of components is out of the capacity of this project and we will only show the path for the analysis of future use cases.
Leader: CNRS
Participants: POLITO, UoA, INTEL, THALES, YOGITECH, ABB
