Partner Polito presents the paper SIFI a reliability evaluation framework for soft-errors built on top of Multi2Sim at 23rd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS’17)
Partner UoA presents the paper RT Level vs. Microarchitecture Level Reliability Assessment: Case Study on ARM Cortex-A9 CPU at the 47th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2017)
Partner UoA presents the paper MeRLiN: Exploiting Dynamic Instruction Behavior for Fast and Accurate Microarchitecture Level Reliability Assessment at the the 44th Annual International Symposium on Computer Architecture (ISCA '17)
A. Vallero, S. Di Carlo, S. Tselonis and D. Gizopoulos, 2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), Santa Rosa, CA, USA, 2017, pp. 129-130. doi: 10.1109/ISPASS.2017.7975280DOI
Partner Polito presents the poster Microarchitecture Level Reliability Comparison of Modern GPU Designs: First Findings at the 2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS'17)
Partners POLITO, UPC, UoA and CRNS are going to present innovative results and tools of the CLERECO project at the XXXI edition of the Design of Circuits and Integrated Systems Conference, DCIS 2016, held in Granada, Spain from 23rd to 25th November 2016.
Partner POLITO presents the paper Cross-Layer System Reliability Assessment Against Hardware Faults at International Test Conference, ITC 2016 in Fort Worth Texas, TX.