News

Paper presentation @ IOLTS 2017 in Thessaloniki, Greece

2017-07-18T06:57:03+00:00

Partner Polito presents the paper SIFI a reliability evaluation framework for soft-errors built on top of Multi2Sim at 23rd IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS’17)

Paper presentation @ DSN 2017 in Denver, Colorado

2017-07-18T06:51:41+00:00

Partner UoA presents the paper RT Level vs. Microarchitecture Level Reliability Assessment: Case Study on ARM Cortex-A9 CPU at the 47th IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2017)

Paper presentation @ ISCA 2017 in Toronto

2017-07-18T06:51:37+00:00

Partner UoA presents the paper MeRLiN: Exploiting Dynamic Instruction Behavior for Fast and Accurate Microarchitecture Level Reliability Assessment at the the 44th Annual International Symposium on Computer Architecture (ISCA '17)

CLERECO on the HiPEAC magazine

2017-04-28T11:49:21+00:00

Dear all HiPEACinfo vol. 50 is now available for download from the HiPEAC website (https://www.hipeac.net/assets/public/publications/newsletter/hipeacinfo50.pdf). It contains an nice overview of the Clereco results. If you have a LinkedIn account, please consider posting about your article and sharing the link to the magazine via LinkedIn.

Paper presentation @ ISPASS 2017 in Santa Rosa, California

2017-04-28T11:35:12+00:00

Partner Polito presents the poster Microarchitecture Level Reliability Comparison of Modern GPU Designs: First Findings at the 2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS'17)

Paper presentation @ VTS 2017 in Las Vegas, USA

2017-04-11T09:10:58+00:00

Partner UoA presents the paper Performance-Aware Reliability Assessment of Heterogeneous Chips at 35th IEEE VLSI Test Symposium 2017 (VTS17)

Clereco FP7 Collaboration project conclusion

2016-12-22T13:37:44+00:00

Torino, December, 2016. The research program of the joint FP7 Collaboration Project CLERECO (Grant No. 611404) aiming to investigate new design methods for early reliability evaluation of digital systems in the forthcoming computing continuum is now successfully concluded.

Special Session @ DCIS 2016, Granada, Spain

2016-11-15T11:46:19+00:00

Partners POLITO, UPC, UoA and CRNS are going to present innovative results and tools of the CLERECO project at the XXXI edition of the Design of Circuits and Integrated Systems Conference, DCIS 2016, held in Granada, Spain from 23rd to 25th November 2016.

Paper presentation @ ITC 2016 in Fort Worth Texas, TX

2016-11-15T11:42:07+00:00

Partner POLITO presents the paper Cross-Layer System Reliability Assessment Against Hardware Faults at International Test Conference, ITC 2016 in Fort Worth Texas, TX.

Project presentation @ PATMOS 2016 in Bremen

2016-09-21T11:44:11+00:00

Partner POLITO presented the project at the special session organized during the PATMOS 2016 26th International Workshop on Power and Timing Modeling, Optimization and Simulation 2016, Bremen, Germani 21-23 September 2016.