Clereco

Cross-Layer Early Reliability Evaluation for the Computing cOntinuum

The CLERECO reliability design methodology offers tools, models and technologies that cover the four main design dimensions of a system design:

• RELTech Tools: offers a set of predictive models to analyze the impact of future tech-nology nodes on specific basic design blocks. Predictive models for technologies are very valuable for OEM and Tier 1 system designers that usually lack access to fab technology data.
• RelHW Tools: offers a set of tools for reliability analysis of different hardware architec-tures. These tools cover the analysis of all major hardware structures of a complex digitals system (i.e., Microprocessors, Accelerators, Memories, Interconnections and Custom IP Cores). A very wide set of ICT players including Tier 2 technology provid-ers, up to OEM system's integrators both in the embedded systems and HPC domain are potentially interested in these tools.
• RelSW Tools: offers capability to analyze software fault masking in isolation from the hardware architecture. Both static and dynamic analysis of the software is support-ed by our technology. These tools have a key value for OEM system designers that exploit software fault tolerance solutions to enhance the reliability of their systems.
• RelSyst Tools: is the core of the CLERECO design methodology. It integrates infor-mation from the other tools into a high-level system model and provides tools to per-form early reliability evaluation at system level as well as tools to perform design space exploration in order to optimize the target system given the reliability con-straints. This is specifically devoted to OEM system's designers that require the evalu-ation of the reliability of their products.