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Tuesday, 09 September 2014 10:20

Cross-Layer Early Reliability Evaluation for the Computing cOntinuum

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Di Carlo, S.; Vallero, A.; Gizopoulos, D.; Di Natale, G.; Grasset, A.; Mariani, R.; Reichenbach, F. in Euromicro Conference on Digital System Design (DSD), 2014, pp.199,205, 27-29 August 2014

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Abstract

Advanced multifunctional computing systems real- ized in forthcoming technologies hold the promise of a significant increase of the computational capability that will offer end-users ever improving services and functionalities (e.g., next generation mobile devices, cloud services, etc.). However, the same path that is leading technologies toward these remarkable achievements is also making electronic devices increasingly unreliable, posing a threat to our society that is depending on the ICT in every aspect of human activities. Reliability of electronic systems is therefore a key challenge for the whole ICT technology and must be guaranteed without penalizing or slowing down the characteristics of the final products. CLERECO EU FP7 (GA No. 611404) research project addresses early accurate reliability evaluation and efficient exploitation of reliability at different design phases, since these aspects are two of the most important and challenging tasks toward this goal.

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  • BIBTEX:
     @INPROCEEDINGS{6927245, 
author={Di Carlo, S. and Vallero, A. and Gizopoulos, D. and Di Natale, G. and Grasset, A. and Mariani, R. and Reichenbach, F.},
booktitle={Digital System Design (DSD), 2014 17th Euromicro Conference on},
title={Cross-Layer Early Reliability Evaluation for the Computing cOntinuum},
year={2014},
month={Aug},
pages={199-205},
doi={10.1109/DSD.2014.65},
}
  • DOI: 10.1109/DSD.2014.65
  • KEYWORDS: circuit reliability, embedded systems, information technology, integrated circuit design, parallel processing
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