Clereco

Cross-Layer Early Reliability Evaluation for the Computing cOntinuum

Di Carlo, S.; Prinetto, P.; Rolfo, D.; Trotta, P., in Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014 IEEE International Symposium on , vol., no., pp.159,164, 1-3 Oct. 2014

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Di Carlo, S.; Indaco, M.; Prinetto, P.; Vatajelu, E.I.; Rodriguez-Montanes, R.; Figueras, J., in Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT), 2014 IEEE International Symposium on , vol., no., pp.75,80, 1-3 Oct. 2014

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Cassano, L.; Bosio, A.; Di Natale, G., in Test Symposium (ETS), 2014 19th IEEE European , vol., no., pp.1,2, 26-30 May 2014

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Di Carlo, S.; Galfano, S.; Indaco, M.; Prinetto, P.; Bertozzi, D.; Olivo, P.; Zambelli, C., in ACM TRANSACTIONS ON ARCHITECTURE AND CODE OPTIMIZATION, 2014, Vol. 11, No. 3, Art. 26, pp. 26:1-26:25,  Ago 2014

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Foutris, N.; Kaliorakis, M.; Tselonis, S.; Gizopoulos, D.,, in IEEE 20th International On-Line Testing Symposium (IOLTS), 2014, pp.140,145, 7-9 July 2014

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Foutris, N.; Gizopoulos, D.; Chatzidimitriou, A.;  Kalamatianos, J.; Sridharan, V., in Proceedings of the 10th IEEE Workshop on Silicon Errors in Logic – System Effects (SELSE 2014), Stanford, CA, USA, April 1-2, 2014. 

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Zuolo, L.; Zambelli, C.; Micheloni, R.; Galfano, S.; Indaco, M.; Di Carlo, S.; Prinetto, P.; Olivo, P.; Bertozzi, D., in Proceedings of the Design, Automation and Test in Europe Conference and Exhibition (DATE), 2014, pp.1,6, 24-28 March 2014

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